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High Speed GMLAN Circuit Description

The data link connector (DLC) allows a scan tool to communicate with the high speed GMLAN serial data circuit. The serial data is transmitted on 2 twisted wires that allow speed up to 500 Kbps. The twisted pair is terminated with two 120 ohms resistors, one is internal to the engine control module (ECM) and the other is internal to the instrument panel module (IPM). The resistors are used to reduce noise on the high speed GMLAN bus during normal vehicle operation. The high speed GMLAN is a differential bus. The high speed GMLAN serial data bus (+) and high speed GMLAN serial data (-) are driven to opposite extremes from a rest or idle level. The idle level which is approximately 2.5 volts is considered a recessive transmitted data and is interpreted as a logic 1. Driving the lines to their extremes adds 1 volt to high speed GMLAN serial data bus (+) and subtracts 1 volt from high speed GMLAN serial data bus (-) wire. This dominant state is interpreted as a logic 0.

Two different outputs are used by IPM to activate the high speed GMLAN bus:

The accessory wake up signal wakes up the ECM and the transmission control module (TCM) only. This output is disabled in Crank power mode for internal fail enable of the ECM and TCM. The high speed communication enable signal wakes up all the other modules on the high speed GMLAN bus.